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IP-Reflective Memory

Shared memory array with automatic updates across a network

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IP-ReflectiveMemory Description

  • Up to 256 nodes per Reflected Memory Loop
  • Standard Ethernet Cable compatible
  • Plug and Play operation
  • 256K x 16 RAM per node
  • Windows Driver available
  • 1 year warranty standard. Extended warranty available.
  • ROHS and Standard processing available
The local area network that is quick to use, simple to operate, easy to maintain.


Each IP-ReflectiveMemory can be used as a standard node or as the Master Node. Clearly labled "DIP Switches" are provided to make the selection of Master or Standard Node, and the Node Address. The Network is based on using LVDS signaling over Ethernet cabling. Nodes automatically come up for pass through operation. Using the memory only requires reading and writing to the shared space. The Hardware takes care of the network side automatically.

All nodes automatically clear their local memory and then wait for the network to be initialized. The Master node initializes the network and then enables the rest of the nodes. LED´s on the rear of the card indicate the current status as well as optional to read status [software]. The network has a default rate of 18.432 MHz. The frequency was chosen to allow for lengths of more than 200 feet between nodes to be implemented without changing the frequency. Standard Cat5e cable was used for our testing.


Board Level Block Diagram


One of the boards in the network is enabled to be the Master. The Master will send out it´s status while the rest of the nodes wait. When the Master receives its status back it issues the Master Enable. On the rear of the cards the Master node will have the Master LED illuminated and the rest of the nodes will have the Master Enable LED. Once the Master Enable is received the other nodes begin using the network and sending their own status messages. The Local Status LED is illuminated when the local status is received back at each node. The status will appear to be on all of the time when properly functioning due to the rate of status being sent and the timer used for the LED. When messages are received from the network the node updates the local memory and passes the message to the next node [processed in parallel] unless the node address matches the node receiving the message in which case the message is filtered out. The master has an additional task of clearing out messages that have been around the loop and not cleared. A special loop-bit set by the Master on each message that passes the Master node for this purpose. The Network LED is illuminated when messages from other nodes are retransmitted. When local writes to memory occur, the messages are also transmitted to the network and cause the IP Access LED to be illuminated. With heavy traffic both activity LED´s may appear to be always on. For writes to local RAM, the location is tested to see if it is already at the same value and if so the write is filtered out to reduce traffic from redundant operations.

The frequency can be changed using the on-board PLL. The PLL is easy to program using the Windows® driver. Reference files are available to support other OS. Using the default rate, close to 1uS transfer times result meaning that the nodes update at close to 1 MHz with a propagation delay of NODE´s X 1 uS plus some overhead. The Network and local paths are supported with FIFO´s. With different cable lengths the frequency can be increased or decreased as needed. Custom default frequencies can be accommodated with an oscillator change.



IP-ReflectiveMemory is standard single wide IP which is 8 and 32 MHz. IP Bus compatible. The IP interface supports the IO, INT, ID and Memory spaces.

The shared memory is 256K x 16 located starting at Memory Space offset 0x00. The memory can be used with separate spaces or or shared spaces for each node. Separate spaces are likely to be used when separate parts of the same process are being worked on with multiple nodes. Combined spaces would be used when multple users are sharing the same data. The hardware does not restrict how the memory is configured or used. An interrupt is avaiable to alert the local CPU when a specific node makes a memory update.

The IO can be connected via RJ-45 connectors on the rear of IP-ReflectiveMemory or using the IP Module IO connector. The RJ-45 connector makes using standard Ethernet cable easy. Custom cables can be supported with the IO connector. The IO connector has the advantage of being lower profile. Type II with the IO connector, and Type III with the RJ-45´s.

The IP Module driver can be instantiated multiple times to control multiple cards by the same CPU. IP-ReflectiveMemory when coupled with the Dynamic Driver "knows" what slot it is in and which carrier it is installed into. The slot and carrier information is required when using multiple cards in a PCI system with dynamic address assignment. A known system configuration can be combined with the slot and carrier information to deterministically access the right card

PCI implementations can be done with the PCI3IP and PCI5IP. Applications from 1 node to 5 connections per PCI slot.
PCIe implementations can be done with the PCIe3IP and PCIe5IP. Applications with 1 - 5 ReflectiveMemory Nodes per PCIe slot.
cPCI 3U is supported with the cPCI2IP. Applications with 1 or 2 ReflectiveMemory Nodes per 3U cPCI slot.
cPCI 6U is supported with the cPCI4IP. Applications from 1 to 4 ReflectiveMemory Nodes per 6U cPCI slot.
PC104p is supported with the PC104pIP. Applications with 1 ReflectiveMemory Nodes per PC104 stack position.
PC104p situations with a custom mechanical can be done with the PC104p4IP.
Applications from 1 to 4 ReflectiveMemory Nodes per PC104 stack position.

IP-ReflectiveMemory Features

Size
1.8x3.9 inches nominal single slot IP Module. Type II with low profile passives on rear for IO connector IO model and Type III for RJ-45 model
IO
RJ-45 or IP Module IO based Input and Output Network Connections
Clocks
Compatible with 8 and 32 MHz IP bus operation. 50 MHz oscillator,
IP Decoding
ID, IO, Mem and INT spaces supported.
Memory
256K x 16 RAM designed in. Starts at offset 0x00 in Memory Space
Node Programming
Two DipSwitches used to select Node Address and Master or Standard Node. Silk Screen definitions for switches.
Interrupts
Programmable interrupts for each channel are supported. Masked interrupts can be used in polled mode by reading the status register. Interrupts are mapped to INTR0n on IP bus.
Power Requirement
+5V. Approximately 52 mA at 5V typical unloaded.
SW Interface
All FPGA registers are read-write. All registers on word addresses. Each channel has separate control registers.
Clocks
18.432 Mhz reference clock supplied. Customer specific frequencies can be implemented. In most cases the default rate can be used with no programming required.
Current Fab Number
10-2009-0207
Reliability
1.685 Million Hours per Bellcore 25C GB

IP-ReflectiveMemory Benefits

Speed
The IP interface supports 32 MHz operation for quick data loading and unloading. The interface supports interrupts and polling. The network interface supports rapid automatically updated " Reflective Memory". Dynamic Engineering carriers support 64/32 to 16 conversion in HW allowing for 64/32 bit accesses on the PCIe/PCI bus and 64/32 bit memory models.
Price
System level cost is best when reasonably priced reliable hardware is used and NRE minimized. With IP-ReflectiveMemory, driver support for the carrier and IP level, reference software, history of reliable operation, and fantastic client support your cost per unit and overall costs are attractive.
Ease of Use
and see for yourself. The engineering kit provides a good starting point for a new user. The reference software supports network operation, interrupts and more.
Availability
IP-ReflectiveMemory is a stocked item.
IP Specification Compatibility
IP-ReflectiveMemory is compliant per the VITA 4 - 1995 specification. Tested with PCI and PCIe based carriers. All Dynamic Engineering IP Modules are compatible with the PCIe3IP, PCIe5IP, VPXI2IP, PCI3IP, PCI5IP, cPCI2IP, cPCI4IP, PC104pIP etc. IP-ReflectiveMemory will operate with any IP specification compliant carrier board.

Part Number: IP-ReflectiveMemory
Ordering Options

  • IP-ReflectiveMemory Standard board - RJ45 connector model with 256Kx16 RAM, upto 256 nodes, LVDS signaling
  • -IO Remove RJ45 connectors, and use IP Module IO connector. Creates a type II board implementation and may help with client custom wiring
  • -ROHS Use ROHS processing. Standard processing is "leaded"
  • -CC Option to add Conformal Coating
  • -XXX See Manuals section for customized versions and replace XXX with type

IP-ReflectiveMemory Drivers

Software Support for IP-ReflectiveMemory includes: Windows® 7 compliant drivers
The IP driver is layered and operates on top of the Carrier driver. IP drivers are auto installed for each instance detected. Please see the Driver manuals for the specifics of each type.

Drivers and Reference SW are developed for each type / version of IP-ReflectiveMemory implemented. When custom versions are ordered the NRE will include providing Windows, Linux, and or VxWorks packages. For off-the-shelf models, select on the manuals tab, the Windows® and Linux SW shown is included with your purchase of the HW. A small one-time charge is required for the VxWorks versions. Unsupported SW versions may have an NRE requirement.

Integration support is available. Please contact Dynamic Engineering for this option or download the Technical Support Description from the Company button.

linux diagram
Reference diagam of how our Linux Driver / Application layer operate with the Carrier and IP Module.

IP-ReflectiveMemory Manuals

Click on the links to Download selected manuals in PDF format.
Please download the Hardware manual Rev F
Please download the Windows® 7 Driver manual Rev A
Please download the Windows® XP Driver manual Rev B5