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Dynamic Engineering's Industrypack Compatible Designs

IP-QuadUART

Front View



The IndustryPack compatible IP-QuadUART design integrates a quad UART onto an IndustryPack module. The UART (16C854) features 128 byte FIFOs for RX and TX ports on each channel. The UART is supported by an advanced IP module interface implemented within a Xilinx FPGA.

The UART is a character based interface [8 bits]. The IndustryPack interface has several features which optimize performance. Words can be written to the IP-QuadUART and the data will be converted to bytes before being sent to the UART. The IP interface will latch the data allowing the host computer to be released while the data is being moved to the UART. The early release allows pipelined operation and increased performance. When the IP-QuadUART is mounted to a carrier which supports 32 bit operations the effect can be enhanced. The PCI3IP, PCI5IP , cPCI4IP and cPCI2IP and other Dynamic Engineering carriers support 32 bit access to IndustryPacks.

When reading data the IP-QuadUART supports 8, 16, and 32 bit accesses by assembling the bytes read from the UART into a register within the Xilinx. With 32 bit reads 1/4 of the data transfer cycles are needed. In the standard mode the data is read when the host performs the transfer cycle. An optional higher performance mode of operation is the pre-read mode. In pre-read the UART is read and the data stored within the Xilinx. With the data stored internal to the Xilinx the data can be accessed without waiting for the UART.

The IP-QuadUART is compatible with 8 and 32 MHz IP bus interfaces. A speed select control bit optimizes the state machine for either frequency.

The IP-QuadUART is compatible with RS-232 and RS-422 / RS-485 requirements. Software can select RS232 or RS422 operation on each channel independently. When in RS232 mode the full complement of MODEM signals are available [ RX, TX, RTS, CTS, DTR, DSR, RI, DCD ]. When in RS422 mode the signals supported are [RX, TX, CTS, RTS ]. Analog switches allow software control over the termination resistors on each receive channel separately. Software also has control over the output drivers in RS422 mode to allow multi-drop operation.

The UART IO is available at the IO connector. Most IP carriers route the IP module IO connectors to 50 pin headers to support ribbon cable. The HDRterm50 can be used to create a terminal block interface. In the future a transition module will be available with ribbon to 4 - D connectors, and DIN compatible.

Two local oscillators are provided to allow the full range of the UART to be utilized. 24 MHz and 18.432 Mhz oscillators provide 1.5 M max rate with RS-422 and all of the standard baud rates up to 230K with RS-232 [500K with a short cable].



IP-QuadUART Features

  • Size
    		•  IP Module Type II with .043" on rear.

  • UART Channels
    		•  4 full UART channels are provided

  • Interface
    		•  Each of the 4 UART ports can be selected to be RS-232 or RS-422 compatible with software. Any combination of channels is valid.

  • Speed
    		•  In RS-232 mode each channel is rated for 230K max [500K with a short cable]. In RS-422 mode each channel can operate up to 1.5M.

  • Enables
    		•  When in RS-422 mode the channel can have its TX drivers enabled or disabled. This is handy for internal loop-back test without broadcasting and for multi-drop [RS-485] operation.

  • Termination
    		•  Each of the channels in RS-422 mode can have a termination on the RX and CTS signals or be left unterminated. In point-to-point operation the termination will normally be activated, and in multi-drop operation the cable will provide the termination at the end points. Software controlled.

  • Clocks
    		•  8 and 32 MHz operation IP Module bus operation.

  • Access Width
    		•  ID PROM is byte wide, internal control register is word wide, UART is byte wide.

  • ID PROM
    		•  The IDPROM is build into the Xilinx. The PROM contents are available to determine the current revision of the IP-QuadUART and to determine the slot location. The user manual has the expected data content definition.

  • Write cycle
    		•  The write cycle to the QuadUART is pipelined with an early termination to the IP host. The pipelining reduces the access time in writing to the UART FIFO memory. Byte expansion from words is supported.

  • Read cycle
    		•  Read cycles wait for data to be available from the UART or can be selected to pre-read the data to support higher performance operation. Byte packing into words is supported.

  • Software Interface
    		•  Control registers are read-writeable
    IO, ID, INT spaces supported.

  • Interrupts
    		•  Interrupt level 0 is used to route the QuadUART interrupt to the host computer. The interrupt is maskable and pollable.

  • Power Requirement
    		•  +5V,+12,-12

  • Oscillator
    		•  Two oscillators are provided to cover the full frequency range of UART and extended operations. The oscillator frequencies [24 and 18.432] can be changed upon request. Custom versions with special frequency requirements can be supported.

  • MTBF
    		•  BellCore 25C GB 1,620,017 Hours




    IP-QuadUART Benefits

  • Speed
    		•  The IP-QuadUART is compatible with 8 and 32 MHz IP reference rates with write through to UART capability. The UARTs have deep FIFOs to support the higher bandwidth. Use with the PCI3IP or PCI5IP for maximum throughput. High baud rates supported in RS-232 and RS-422 modes of operation. Why wait for the competition when you can be ahead of the game with Dynamic Engineering.

  • Price
    		•  The IP-QuadUART has the low price point. Add 4 high speed UARTs with memory and a flexible electrical interface in one slot where other solutions take several. Fewer slots and fewer dollars are a winning combination.

  • Ease of Use
    		•  The QuadUART is easy to use. A point and shoot user interface to the UART. Please download the manual and see for yourself. The engineering kit provides a good starting point for a new user. The reference software does a loop-back test and set-ups the different modes of operation.

  • Availability
    		•  The IP-QuadUART is a popular board. We keep the IP-QuadUART in stock. Send in your order and in most cases have your hardware the next day - delivered to you via FedEx.

  • Size
    		•  The IP-QuadUART in standard configuration is a Type 2 size IP module which conforms to the IndustryPack mechanical and electrical specifications. Only .043" on the rear means no mechanical interference issues. The IP-QuadUART can be used in all IP slots. A Type 1 version is available with preselected 232/422 capabilities.

  • IP Compatibility
    		•  The IP-QuadUART is IP compliant per the VITA 4 - 1995 specification. All Dynamic Engineering IP Modules are compatible with Dynamic Engineering carriers. The IP-QuadUART will operate with any IP specification compliant carrier board.


    Ordering Information

    Quantity


    Engineering Kits


    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. We recognize that different customers have different needs. The Engineering Kits are standardized in description to help with selection. The kits are segmented to allow for customers who only need hardware support, software support or a mixture. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.

    IP-QuadUART- Eng-1 .......... Hardware Support Engineering Kit includes:
    Board level Schematics [PDF], IP-Debug-Bus, IP-Debug-IO.

    IP-QuadUART-Eng-2 .......... Hardware Support plus Driver Engineering Kit includes:
    Board level Schematics [PDF], Software[IP-QuadUART Driver and sample application zip file ], IP-Debug-Bus, IP-Debug-IO.

    IP-QuadUART- Driver.......... Software Support Only Windows®XP and 2000 compliant drivers for the IP-QuadUART: The driver is designed to work with a carrier driver - PCI3IP, PCI5IP, cPCI2IP, cPCI4IP, PC/104p4IP etc. Please contact Dynamic Engineering if you would like us to produce one for your IP or a third party design.

    You must have Adobe Acrobat to read our PDF files.

    IP-QuadUART Driver Manual
    IP-QuadUART Hardware Manual


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