Off The Top; is a forum to present products, concepts, techniques, and strategies for implementing your system with information about current work, past accomplishments, and future plans. Use our On Deck products for your proposals - they will be Mission Accomplished when your PO comes in.
We continuously build our business with our satisfied customers. We appreciate your referrals. At Dynamic Engineering we are open to your suggestions and specific requirements. Perhaps you have an idea for a new product, or how to make an existing product better for you. Send your dynamic ideas to engineering@dyneng.com. Let us know who you are referring and what your ideas are... and we would like to send you a thank you gift.
To navigate use the Java menu´s located at the top left of each web page.
Titles shown on the menu bar are for the categories.
Within each category are sub-categories for the individual products.
(Example - if you need a parallel IO card in an IndustryPack® system then take a look under Embedded Solutions => IndustryPack® and navigate to the Digital IO menu to select a product)
Once you click on the product your web browser will go directly to that Dynamic Data Sheet DDS.
The menu is on each page for ease of navigatation. Sometimes the basic architecture is known and the exact implementation is not.
To gain ideas for implementation strategies check the bottom of the menus for suggestions.
We are ready to help you to find a product, or design your specific architecture - call us - our number is on the top of each page.
Products that are in progress
The On Deck section will be useful for your intermediate requirements
CPU Designs
Multiple Formats: prPMC, PC104p, X4, PCI, custom
Fast Dual Core FreeScale CPU
Industrial Temperature Range
DDR II - 512 MBytes or 1 Gbyte
FLASH / Boot memory - 64 or 128 MBytes
USB - multiple ports depending on platform
Serial ports - 2
Ethernet 10/100/1000 1-4 depending on platform
PCI/PCI-X and PCIe support
Temperature sensor
Voltage measurement on primary buses [+12, -12, +5, +3]
EEPROM
Current status is: Schematic level design completed. Footprints for layout completed. Parts placement completed. Heatsink design started. Front panel design started. Routing started.
We plan to do the 4 listed versions - basically the same design in different forms, plus have our first custom version in discussion. Contact keith@dyneng.com to influence the order of the designs.
Upgraded Altera device : Cyclone IV E [114480 LE´s, 3.8Mbits RAM, 4 internal PLL´s, 20 global clocks]
40 Differential IO - LVDS, 485 or mixed
12 TTL IO and options to replace some of differential IO with TTL
16 DMA channels to support bidirectional operation with 8 channels between PCIe and Altera.
Pre-programmed Lattice provides the PCIe [4 lane], DMA, and FIFO resources
8 PLL´s each with 3 outputs to support Altera
Programmable FIFO levels with status tied to Altera for flow control
Load or Reload Altera on the fly.
Option to load Altera from FLASH
Interrupts and other standard features of PCI-Altera supported
Driver support for Linux and Windows®
Current status is: In design.
PCIe-ADC-88C116
New design 88 channel ADC card with up to 116 KHz sample rate.
PCIe format
D100 connector with breakout available
options for scaling the input, filtering, single ended and differential operation
Positive ID in system to allow for multiple cards to be in use and positive ID from the application SW.
Separate analog ground paths for each group of 8 channels to allow for multiple separate measurement points
OpAmp buffering to reduce load on signals being measured and to allow for scaling, and filtering possibilities
Schematic is completed. Layout will follow X2 and X4 updates.
We have designed this card to allow testing of each of the printer interface cards [see below] used in a client system.
Customization:
Currently Dynamic Engineering has customized card designs under contract:
SpaceWire driver using INtime from Tenasys. The basic concept of the INtime system is to allow the real time component [SpaceWire in this case] run on a specified CPU in a multi-core system. This allows standard Windows to be operating on the other processors and the time critical function on the dedicated processor. Driver is in design currently.
Update for the cPCI Receiver Controller to be VPX based plus some new content features. The design will be updated to a Spartan VI and tied directly to 1 lane [PCIe] on the VPX connector.
Update for the PCI-ASCB to operate with the revision E ASCB protocol [8b10b encoding]. This design is in T&I currently.
Products that are planned Dynamic Engineering frequently helps with customer architecture and design solutions. Call and we can help you. Please share your requirements with us - format, functions, special features required, method of cooling, temperature range etc.engineering@dyneng.com or 831.457.8891
PCIe is becoming main stream and DE will support with carriers and native cards. PCIe2PMC adapter for PMC into a PCIe slot, PCIe2PMCX2 - two postion version with more PCIe lanes, PCIe2PMCe - PCIe adapter for XMCe [PMC with express connector], PCIe adapters for IndustryPack®, SpaceWire and others. A single slot PMC carrier with 1 and 4 lanes was the first. PCIeBPMCX2 2 slot PMC carrier is next [completed]. See above for features and status.
IP and PMC carriers for VME - tell us which VME versions you need covered - size and bus
IP carriers for PCIe - 3 and 5 slot versions planned.
PMC carriers for cPCIe - Industrial Temp, Zero Slot Fan supported, 1A local power supply for -12V rail, Std PCI and PCI-X capabilities, XMC capabilies.
PMC-429 with flow through data architecture to allow programmed transmission of data, and data filtering functions to be added.
IP-Parallel updated with new FPGA to allow for memory based IO functions, and enhanced base feature set.
PMC-Parallel-HV - Up to 40V operation, with programmable input thresholds - COS on all inputs, memory and DMA for waveform applications, clocking options.
PMC-OptoISO - Up to 60V operation, with optical Isolation. 1.5A on each channel. Matching OptoIso inputs.
PMC-SpaceWire-400 - port the PMC-SpaceWire design and upgrade to 400 MHz.
Space-104 SpaceWire
PMC-XM-TTL => update the PMC-XM to have TTL IO and connector built in
PCI-104-User-Diff => Port of the PMC version to PCI-104.
cPCI 3U and VME 3U Cool Fan board to promote airflow. The Fan Board can make an effective method for spot cooling for high powered boards in tight places. Zero slot fans available. 6U versions are available:cPCI-6U-COOL and VME-6U-COOL
The Dynamic Data Sheets are useful for your immediate needs
PMC BiSerial III Octal UART : 8 UARTs with RS422 at 5MHz - Design complete - tested at 10 MHz Full DMA support
PMC-SpaceWire has been updated [VHDL] to use the two external 128K x 32 FIFO´s on separate channels. Channel 0 and channel 1 will have larger receive side FIFO´s. Please note that our common FLASH model will allow this update to be offered on all models [PMC, ccPMC, PCI, and PC104p].
PMC-BiSerial-III has a new version "NG8" to handle Camera Data. Transmit or Receive with two channels per card. 133Kx32 FIFO to support either RX or TX function per channel. "Channelized DMA"™. PLL control of transmit frequency. HREF, VREF, Bad Pixel, Clock, Pixel Data [11:0]. Image size is programmable. Active and blanking areas are programmable. WIndows® driver available along with reference application. Hardware and Driver manuals on the BiSerial page
PCIBPMCET is a new design based on the PCIBPMC incorporating an industrial temperature bridge, and matched length differential routing to rear IO connectors. Offered with ROHS and standard processing. Please see the DDS for more information.
PMC-BiSerial-III has a new version to handle telemetry data "NASA1". 4 channels with 4 full duplex functions. LADEE - LLST, NMS, UART, Manchester [Uplink and Downlink]. "Channelized DMA"™. PLL control of transmit frequency. WIndows® driver available along with reference application. Hardware and Driver manuals on the BiSerial page
PCIeBiSerialDb37 is a PCIexpress format, half length design featuring a Spartan III FPGA with differential IO and a DB37 connector at the bezel. The 18 IO can be set to LVDS, RS-422/RS-485 or a combination. Full and half duplex operation, programmable direction and termination, FPGA and memory options, ROHS and standard processing, Windows® and Linux drivers. Initial implementation provides an ARC-210 compatible interface.
IP-Connector-Saver Necessity is the root of invention. Tired of wearing out our IP Module connectors during test we decided to design a connector saver for IP Modules. Combined Carrier side and Module side connectors in a stacked configuration using a miniature PCB allows us to test our Carriers without destroying our IP-Test modules. The added air-space between the IP and carrier can be used for increased air-flow and taller components. Since the full added space can go to the Module the effect is "triple" the IP component height that can be used.
PC104pPWR28. PC104p, PCI-104, PC104 compliant power supply with &34;28V&24; input power. All power rails energized [+12, -12, +5, +3.3, -5]. Headers available for chassis level fan support. VIO selection for PCI bus capable boards. Suitable for conduction and convertion cooled systems.
PCIBPC104pET is a PCI 1/2 length card featuring an "ET" bridge to support a PC104p stack in a PCI slot. 1-4 active modules can be in the stack. ROHS and standard processing available.
X2 Motherboard Updated design with enhanced power supplies, featuring 10A standard on 5V and 3.3V rails, 12 or 28V [14-40] power, improved regulation, built in slot 0 functions - arbitration, clock reference, reset, interrupt routing etc., and improved clock options : 33, 66, 100, 133
X4 Motherboard Updated design with enhanced power supplies, featuring 10A standard on 5V and 3.3V rails, 12 or 28V [14-40] power, improved regulation, built in slot 0 functions - arbitration, clock reference, reset, interrupt routing etc., optional fused power to header for embedded situations where coupled with external HW. Voltage monitor and over temperature power supply control. New option for vertical power connector.
Industrial printing application. Combination of base board with multiple power supplies, microprocessor, multiple FPGA's and other custom hardware and Interface cards which plug into base board. We are working closely with our client on this project. Our client had a prototype which "needed help" We have helped with system design, repackaging, redesigning, reducing and improving the design to allow for production and reliability. We are through the initial testing and a mini-production run. Currently in second level production. Client and exact application withheld by NDA
PCI-Altera design customization. Combined operation with 485 and TTL signals for a data transfer interface. Design will be used as a test aparatus for programming and testing a large block of memory. Agilent is the client.
PCI-ECL-II - recently completed new design with 20 ECL outputs, 20 ECL inputs, 12 TTL IO, plus 32 Mb SDRAM x2. Initial design is the STE3 - an updated version of STE1,2 with the larger memories.
Monitor/Debugger for Spacewire White paper and product selection for low cost rapid deploy portable spacewire monitor and debugger. Provides nearly instantaneous around the world portable SpaceWire solution. Download the full Spacewire_WhitePaper presented at the 2008 International Spacewire Conference.
