Off The Top; is a forum to present products, concepts, techniques, and strategies for implementing your system with information about current work, past accomplishments, and future plans. Use our On Deck products for your proposals - they will be Mission Accomplished when your PO comes in.
We continuously build our business with our satisfied customers. We appreciate your referrals. At Dynamic Engineering we are open to your suggestions and specific requirements. Perhaps you have an idea for a new product, or how to make an existing product better for you. Send your dynamic ideas to engineering@dyneng.com. Let us know who you are referring and what your ideas are... and we would like to send you a thank you gift.
To navigate use the Java menu´s located at the top left of each web page.
Titles shown on the menu bar are for the categories.
Within each category are sub-categories for the individual products.
(Example - if you need a parallel IO card in an IndustryPack® system then take a look under Embedded Solutions => IndustryPack® and navigate to the Digital IO menu to select a product)
Once you click on the product your web browser will go directly to that Dynamic Data Sheet DDS.
The menu is on each page for ease of navigatation. Sometimes the basic architecture is known and the exact implementation is not.
To gain ideas for implementation strategies check the bottom of the menus for suggestions.
We are ready to help you to find a product, or design your specific architecture - call us - our number is on the top of each page.
Status: Schematic complete. Placement complete. Routing complete. In manufacturing.
CPU Designs
Multiple Formats: prPMC, PC104p, X4, PCI, custom
1.33 GHz FreeScale CPU
Industrial Temperature Range
DDR II - 512 MBytes or 1 Gbyte
FLASH / Boot memory - 64 or 128 MBytes
USB - multiple ports depending on platform
Serial ports - 2
Ethernet 10/100/1000 1-4 depending on platform
PCI/PCI-X and PCIe support
Temperature sensorVoltage measurement on primary buses [+12, -12, +5, +3]
EEPROM
Current status is: Schematic level design completed. Footprints for layout completed. Parts placement completed. Heatsink design started. Front panel design started. Routing started.
We plan to do the 4 listed versions - basically the same design in different forms, plus have our first custom version in discussion. Contact keith@dyneng.com to influence the order of the designs.
IP-ConnectorSaver
New design:
Stacked IP Module connectors to allow for taller IP Modules and or to save wear on the build in connectors when high repetitions are used - for example in test
Status: Complete and in use in our manufacturing facility. Call for more information.
PC104, PCI-104, and PC104p voltages and form factors
28V [14-34] input
High efficiency design
Fused filtered power supply outputs
5V(8A), 3.3V(8A), 12V(1A+), -12V(1A+), -5V(1A+) [supplies can handle more than the stacking pins]
Over Voltage protection
LED´s
ROHS or Standard processing
Full Load individual supply tests concluded. Chassis thermal testing is now in progress. Performing burn-in with loads. 2 hours at each load with temperature at ground plane, 5V, 3V, +12, -12, and -5V measured and recorded plus current from 28V supply and room temperature. Loads in 1A steps. Temperature test aparatus updated and chassis level tests in progress.
Two models with minimized footprint [6.39 in. x 4.18 in. x 1.72 in. for X2 version]
Easy to assemble
Air Cooled with twin 3.8 CFM fans
Bezel IO
Built in Power supply, and slot 0 functions - arbitration, clock reference, reset, interrupt routing etc. with X2 and X4
Chassis are in stock.
Design work was done using the DDC PrPMC using Linux to provide a drop in PrPMC solution for the X2 and X4 chassis. A recipe has been developed to make it easy to add the PrPMC, drivers and software to the chassis. Current status: initial integration complete - basic PrPMC functions operating in a design environment. Current development: Linux driver for the PMC Parallel TTL has been written to run with embedded Linux on the DDC PrPMC. PMC Parallel TTL BA16 driver and test suite completed. DDC has decided not to manufacture the PrPMC we were using. Our test suite is available to provide a great starting point on another third party PrPMC. Free with PMC MC X4 purchase. => Dynamic Engineering CPU designs are in progress. See above On Deck.
Customization:
Currently Dynamic Engineering has customized card designs under contract:
cPCIDART : New custom design with Analog IO, and user programmable FPGA targeted at low level signals associated with biofeed-back. Recently updated to use a main card base board and mezzanine. The base board has the PCI interface with an 8 channel DMA controller plus local power supplies. The mezzanine card has a user programmable Spartan III 2000 plus whatever IO is added. The PCI interface FPGA is interconnected to the User FPGA with an efficient high speed differential serial interface - one per channel plus a command link. The interface allows for 8 full duplex channels on the mezzanine using DMA. Status: Base design test completed. Mezzanine testing in process. Communicated testing between base and mezzanine complete. DAC/ADC testing complete. Test complete at DE. In T&I at client facility.
cPCI Receiver Controller: Multiple SPI interfaces[5], DAC [8], ADC[8], misc. TTL and 50 ohm control signals. T&I complete at DE. T&I in progress at customer site. Client inspired updates for added functionality in progress to move from prototype to production version. Schematic updated, layout updated, new fab´s in house, assembled, tested, shipped. In T&I at client facility in Australia.
Products that are planned Dynamic Engineering frequently helps with customer architecture and design solutions. Call and we can help you. Please share your requirements with us - format, functions, special features required, method of cooling, temperature range etc.engineering@dyneng.com or 831.457.8891
PCIe is becomming main stream and DE will support with carriers and native cards. PCIe2PMC adapter for PMC into a PCIe slot, PCIe2PMCX2 - two postion version with more PCIe lanes, PCIe2PMCe - PCIe adapter for XMCe [PMC with express connector], PCIe adapters for IndustryPack®, SpaceWire and others. A single slot PMC carrier with 1 and 4 lanes was the first. PCIeBPMCX2 2 slot PMC carrier is next. See above for features and status.
IP and PMC carriers for VME - tell us which VME versions you need covered - size and bus
IP carriers for PCIe - 3 and 5 slot versions planned.
PMC carriers for cPCIe - Industrial Temp, Zero Slot Fan supported, 1A local power supply for -12V rail, Std PCI and PCI-X capabilities, XMC capabilies.
PMC-429 with flow through data architecture to allow programmed transmission of data, and data filtering functions to be added.
IP-Parallel updated with new FPGA to allow for memory based IO functions, and enhanced base feature set.
PMC-Parallel-HV - Up to 40V operation, with programmable input thresholds - COS on all inputs, memory and DMA for waveform applications, clocking options.
PMC-OptoISO - Up to 60V operation, with optical Isolation. 1.5A on each channel. Matching OptoIso inputs.
PMC-SpaceWire-400 - port the PMC-SpaceWire design and upgrade to 400 MHz.
Space-104 SpaceWire
PMC-XM-TTL => update the PMC-XM to have TTL IO and connector built in
PCI-104-User-Diff => Port of the PMC version to PCI-104.
PC104 Cool => stack mountable fan board to promote airflow within the PC104 Chassis. The PC104 Chassis features an internal heat sink and when coupled with the Fan Board can make an effective method heat dissipation.
cPCI 3U and VME 3U Cool Fan board to promote airflow. The Fan Board can make an effective method for spot cooling for high powered boards in tight places. Zero slot fans available. 6U versions are available:cPCI-6U-COOL and VME-6U-COOL
The Dynamic Data Sheets are useful for your immediate needs
PMC BiSerial III Octal UART : 8 UARTs with RS422 at 5MHz - Design complete - tested at 10 MHz Full DMA support
PMC-SpaceWire has been updated [VHDL] to use the two external 128K x 32 FIFO´s on separate channels. Channel 0 and channel 1 will have larger receive side FIFO´s. Please note that our common FLASH model will allow this update to be offered on all models [PMC, ccPMC, PCI, and PC104p].
PMC-BiSerial-III has a new version "NG8" to handle Camera Data. Transmit or Receive with two channels per card. 133Kx32 FIFO to support either RX or TX function per channel. Channelized DMA. PLL control of transmit frequency. HREF, VREF, Bad Pixel, Clock, Pixel Data [11:0]. Image size is programmable. Active and blanking areas are programmable. WIndows® driver available along with reference application. Hardware and Driver manuals on the BiSerial page
PCIBPMCET is a new design based on the PCIBPMC incorporating an industrial temperature bridge, and matched length differential routing to rear IO connectors. Offered with ROHS and standard processing. Please see the DDS for more information.
PMC-BiSerial-III has a new version to handle telemetry data "NASA1". 4 channels with 4 full duplex functions. LADEE - LLST, NMS, UART, Manchester [Uplink and Downlink]. Channelized DMA. PLL control of transmit frequency. WIndows® driver available along with reference application. Hardware and Driver manuals on the BiSerial page
PCIeBiSerialDb37 is a PCIexpress format, half length design featuring a Spartan III FPGA with differential IO and a DB37 connector at the bezel. The 18 IO can be set to LVDS, RS-422/RS-485 or a combination. Full and half duplex operation, programmable direction and termination, FPGA and memory options, ROHS and standard processing, Windows® and Linux drivers. Initial implementation provides an ARC-210 compatible interface.
White paper and product selection for low cost rapid deploy portable spacewire monitor and debugger. Provides nearly instantaneous around the world portable SpaceWire solution. Download the full Spacewire_WhitePaper presented at the 2008 International Spacewire Conference.
