150 DuBois St. Suite #3
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Est. 1988


PMC-Parallel-TTL
64 TTL IO in one slot with COS interrupts
PMC-Parallel-TTL with -FRP and -TRANS

Does your system require single ended TTL or CMOS level signals? Dynamic Engineering has a multitude of solutions covering different architectures and mezzanine types. With most architectures you have a choice with carriers for cPCI, PCI, VME, PCI-104, and other buses for both PMC and IP mezzanine modules. Usually your choice is based on other system constraints as both the PMC and IP can provide the IO you require. Dynamic Engineering can assist in your decision making regarding architecture and other trade-offs. Dynamic Engineering has carriers for IP and PMC modules for most architectures, and is adding more as new solutions are requested by our customers.

The PMC compatible PMC-Parallel-TTL has 64 independent digital IO. The high density makes efficient use of precious PMC slot resources. The IO is available for system connection both through the front panel and via the rear [Pn4] connector. A high density 68 pin SCSI III front panel connector provides the front panel IO. The rear panel IO has a PIM and PIM Carrier available for rear panel wiring options. The HDEterm68 can be used as a breakout for the front or rear panel IO. The HDEcabl68 provides a convenient cable. The pin definitions are consistent with the PMC Parallel IO card to enable users of the PMC Parallel IO to migrate to the PMC Parallel TTL quickly and easily.

Each IO is independently programmable. The outputs can be enabled and driven high or low. When disabled on-board pull-ups terminate the lines. The pull-ups can be referenced to 5V or 3.3V as an ordering option. A master enable is available to allow the user to synchronize the upper and lower outputs for coherant 64 bit operation in a 32 bit system. The master enable can be set to allow independent upper and lower bank updates.

All channels can be read as inputs regardless of the transmit enable programming. Local loop-back can be used for BIT. All IO channels can be used as interrupt generators. Interrupts are programmable to be based on either or both edges for Change of State operation. An external clock, PCI clock, or oscillator can be selected for the reference on the COS operation. The reference can be programmed to be divided to create lower frequencies. An optional PLL is available to support user frequency selection to provide the right sampling rate for your application.

All of the IO are routed through the FPGA device to allow for custom applications that require hardware intervention or specific timing. For example the design of the PMC Parallel TTL supports internal FIFO´s and DMA. With an added state-machine for your interface the hardware can provide much more than a simple parallel interface. Contact Dynamic Engineering for convenient customer specific implementations.

The base model has a simple to use register based interface. The registers are mapped as 32 bit words. All registers are read-writeable. The Windows® compatible [XP/2000] driver is available to provide the system level interface for this design. Use standard C/C++ to control your hardware or use the Hardware manual to make your own software interface. The hardware manual is downloadable from the bottom of this page. The software manual is also available on-line.

64 IO with COS in one slot

PMC-Parallel-TTL Features

  • Size
    		•  Single wide PMC.

  • Parallel Interface
    		•  64 independent channels. The pull-ups can be referenced to 3.3V or 5V. Front Panel [Bezel], Rear IO [Pn4] or Both ports available. Unused ports isolated with resistors for zero bus stub. Matched IO within 1/1000 inch for on-board traces to front and rear.

  • Pull-up Resistor
    		•  470 standard, 1K, 4.7K available. Double pull-ups available

  • Sink Current
    		•  64+ mA per channel

  • Cable interface
    		•  Industry standard SCSI III front panel IO and Pn4 backplane connection.

  • Software Interface
    		•  32 bit registers mapped to the 64 IO channels. Read-back of channel control registers and input registers. Read-write of control registers for card configuration.

  • Interrupts
    		•  All IO Channels can be programmed to cause interrupts. Each channel is programmable to be masked, rising, falling, both [COS]. Interrupts are mapped to INTA on PCI bus.

  • Power Requirement
    		•  +5V only.

  • Protection
    		•  All IO Channels have optional transorb protection. The isolation resistors standard is 0 ohms to Pn4 and 22 ohms to Bezel. Resisive coupling for current limiting and ESD protection.

  • COS Clock
    		•  Input registers are programmable to capture data with the COS clk. SW can select PCI, external or Oscillator as the source for clock. A programmable divider [12 bit] allows a wide range of sampling frequencies to be selected.

  • Custom
    		•  All bits are routed through the FPGA to allow for custom state-machine implementations.



    PMC-Parallel-TTL Benefits

  • Speed
    		•  The PMC-Parallel-TTL is a software controlled HW interface. As fast as the PCI interface can push the data across, the outputs can change. With the Windows® driver several accesses per microsecond can be achieved. Your time to market will be shortened by the easy to use interface, flexibility in design, and off-the-shelf availability. With DMA enabled and FIFO´s instantiated even faster transfers can occur.

  • Price
    		•  The PMC-Parallel-TTL has an attractive price, and low integration cost for a low system cost. The PMC Parallel TTL has an associated PIM and PIM Carrier which can lead to further savings in cPCI environments.

  • Ease of Use
    		•  The PMC-Parallel-TTL is easy to use. A point and shoot user interface to the IO. Please download the manual and see for yourself. The engineering kit provides a good starting point for a new user. 64 bits of user defined IO.

  • Availability
    		•  The PMC-Parallel-TTL is a popular board. We will keep the PMC-Parallel-TTL in stock. Send in your order and in most cases have your hardware the next day - delivered to you via FedEx. Custom versions can be dialed in quickly as well as customer requested VHDL features. Consider using scheduling on your next order. The hardware is available now. The Windows® and Linux drivers will be available soon.

  • Size
    		•  The PMC-Parallel-TTL is a standard single wide PMC [single slot] board which conforms to the PMC mechanical and electrical specifications. Eliminate mechanical interference issues.

  • PMC Compatibility
    		•  The PMC-Parallel-TTL is PMC compliant per the IEEE 1386 specification.

  • PCI Compatibility
    		•  The PMC-Parallel-TTL is PCI compliant. You can develop with a PCI to PMC adapter - PCI2PMC or PCIBPMC etc..


    Engineering Kits


    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. We recognize that different customers have different needs. The Engineering Kits are standardized in description to help with selection. The kits are segmented to allow for customers who only need hardware support, software support or a mixture. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.

    PMC-Parallel-TTL-1 .......... Hardware Support Engineering Kit includes:
    Board level Schematics [PDF], cable and breakout [HDEterm68-MP, HDEcabl68].

    PMC-Parallel-TTL-2 .......... Hardware Support plus Driver Engineering Kit includes:
    Board level Schematics [PDF], Software [PMC-Parallel-TTL Driver and sample application zip file ], cable and breakout [HDEterm68-MP, HDEcabl68] Please note that initial support will be reference software not driver software. Driver will be delivered when available if this option is ordered.

    PMC-Parallel-TTL Drivers.......... Software Support Only Windows®XP and 2000 compliant driver for the PMC-Parallel-TTL:
    Please see the Driver manual for the specifics of installing and using the driver. The driver includes a user application reference which we use to test the boards. The user reference software, driver, and include files make it easy to integrate the PMC-Parallel-TTL into your system. Please note that initial support will be reference software not driver software. Driver will be delivered when available if this option is ordered. Please contact Dynamic Engineering if you would like us to produce one for your PMC or a third party design.


    Ordering Information

    Base part number: PMC-Parallel-TTL
    Primary Options:
    Add one: -FP or blank for front panel IO[Bezel] , -RP for rear panel IO [Pn4], or -FRP for both
    Secondary Options:
    -TRANS to add transorbs
    -PLL to add PLL
    -CC to add conformal coating
    -ET to add Industrial Temp [-40 +85]
    -TS to add thumbscrew option - standard is latch block
    -3V to change from 5V IO reference to 3.3V IO reference

    Build Option: Optional Component Options: Engineering Kit Option:

    Quantity

    Related Products
    Related: HDEcabl68 SCSI II/III Cable, HDEterm68 SCSI II/III to 68 pin terminal block, PCI2PMC adapter card, PIM-Parallel-IO facilitate rear panel IO


    Manuals

    Download the PMC-Parallel-TTL Rev A1 Manual in Adobe Acrobat PDF format.

    Download the PMC-Parallel-TTL Driver Manual rev A in Adobe Acrobat PDF format.

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