PMC-BiSerial II PMC Compatible Bi-Directional Serial Data Interface




The PMC-BiSerial-III is recommended for new designs. This page remains published to allow for documentation download and reference purposes.

The PMC BiSerial has been updated to be even better. Building on the knowledge and experience gathered from multiple IP and PMC BiSerial implementations and adding in the latest technology has created the PMC-BiSerial-II. The BiSerial II features completely isolated FIFOs with 32 bit ports for increased adaptability and performance. 32 - 20/40 MHz 485 buffers with programmable termination and direction can be configured to your systems requirements. An expanded faster FPGA will implement the most complex state-machines. The connector pinouts are the same for the first 20 channels to help with migration of older designs.

The PMC-BiSerial-IO is still available. The PMC-BiSerial-II is recommended for new designs.

Two fully independent and highly programmable RS-485 / RS-422 IO channels are provided by the PMC-BiSerial design. The channels are supported by two independent state-machines created within the Xilinx FPGA. The two channels can have the same or different protocols. Manchester encoding and decoding, standard serial [UART], control, command, instrumentation, and custom protocols can be implemented.

Each channel has a separate FIFO with 16Kbytes standard and up to 512Kbytes as an option. The FIFOs are 32 bits wide to optimize data transfer from the PCI bus. The interface is optimized to minimize the latency on the PCI bus. The data transfer size can be anything on the IO side. The FIFOs support internal loop-back testing. The loop-back test can be used for BIT and for software development. The programmable FIFO flags are supported on both sets of FIFO. Programmable Almost Full, Programmable Almost Empty, plus Full, Half Full, and Empty. The programmable flags can be set to any debth to allow the software a programmable delay from event to empty or full. The interrupts can be very useful when sending or receiving messages larger than the FIFO size. The interrupts are programmable and provisions are made to allow polling.

The PMC-BiSerial has 32 transceivers which can be used for any combination of input and output functions. Parallel and serial data, multiple channels, and different hand-shaking schemes can be implemented with the quantity of IO on the PMC-BiSerial. The transceivers support up to 40 Mhz clock and data rates.

The base design has a clock multiplexor coupled with a programmable divider to provide PCI, local oscillator and external clocking options along with divided versions. Custom oscillator frequencies can be installed when an exact frequency is required. The standard oscillator is 20 MHz. The DLL in the Xilinx can be used to create custom frequencies based on readily available references to allow quick turn prototyping.

If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface.... email us your wish list or call today!

PMC-BiSerial II Block Diagram



The standard timing [-IO] uses the clock and strobe to transmit and to receive the data. Data is shifted to the next bit on the falling edge and valid of the rising edge of the clock. The Set-up and hold are approximately 50/50 for a very stable interface. The clock edge can be reversed, the strobe can be made to be active high, the data width can be changed, the bit order can be changed etc.. Frequently parity or other error correction provisions are added. If the standard or one of the customer specific protocols will work for you - fantastic - and if not please let us know what you need and we can implement it for you.

PMC-BiSerial Standard Timing




PMC-BiSerial-II Features

  • Size
    		•  Standard Single PMC

  • Transmit Speeds
    		•  Up to 40 MHz RS485 signaling supported. Designed in clock generator. Location for reference oscillator for specific frequency requirements.

  • PCI Speed
    		•  Standard 33 MHz. operation

  • PCI Access Width
    		•  Standard 32 bit operation supported.

  • Software Interface
    		•  PMC registers are read-writeable. Transmit and Receive functions separated.

  • Interrupts
    		•  Transmit and Receive state-machines, FIFO Programmable almost empty [transmit] and programmable almost full [receive] have programmable interrupts. Status can be polled for non-interrupt driven operation as well.

  • Signaling
    		•  32 RS-485 / RS-422 compatible IO are provided. Any combination of transmit or receive channels can be created. Programmable termination. Optional transformer coupling on four channels.

  • IO
    		•  The IO is available via the PMC bezel connector and / or the PMC "user IO" connector Pn4. The differential IO is properly routed with controlled spacing and matched lengths on each of the pairs. The Pn4 IO can be removed from the circuit for customers not wishing to use rear panel IO. Please specify "no Pn4" with -X4 added to the part number.

  • Interface
    		•  The -IO version of the PMC BiSerial has support for Data, Clock and Strobe. Custom programmed interfaces are available with other options.

  • Power
    		•  +5 only. 3.3 converted with on-board regulator.

  • Memory
    		•  Separate FIFOs are provided for both channels.
    4K x 32 is standard. 8K, 16K, 32K, 64K, and 128K x 32 are available.





    PMC BiSerial II Benefits

  • Speed
    		•  The PMC BiSerial is optimized for serial interfacing requirements. The FIFO memories and programmable interrupts off-load the CPU from most of the management other implementations require. The FIFO access is optimized for the PCI bus further reducing overhead by speeding up the data transfer. On the IO side the PMC BiSerial has independent channel functions. Both channels can operate at maximum rate in parallel.

  • Price
    		•  The PMC BiSerial is easily programmed to implement new functions. Many previously implemented "custom designs" are available too. Without the costs of schematic level design, layout, debugging etc. a modified BiSerial will represent a large cost savings in your budget.

  • Ease of Use
    		•  The PMC BiSerial is easy to use. Point and shoot - just fill the FIFO and set the start bit to get your custom protocol transmitting. Built in loop-back capabilities and engineering kits help with integration into your system. We can write a custom Windows driver for you.

  • Availability
    		•  Dynamic Engineering works to keep the PMC BiSerial in stock. Send in your order and in most cases have your hardware the next day. With a custom design a 1-2 week design period is usually required. We can support immediately with the -IO version then send updated PROMs later to help get your project going - right away.

  • Size
    		•  The PMC BiSerial is a standard single width PMC card and meets the PMC mechanical specifications. The PMC BiSerial can be used in all PMC slots.

  • PMC Compatibility
    		•  The PMC BiSerial is PMC compliant per the IEEE 1386 specification.

  • PCI Compatibility
    		•  The PMC BiSerial is PCI compliant. You can develop with a PCI to PMC adapter - PCI2PMC or PCIBPMC.

    PMC-BiSerial II Order Information
    1 year warranty
    Quantity discounts available
    PMC-BiSerial-II - Standard version with 16Kb FIFO per channel, standard timing
    PMC-BiSerial-II-8 - Standard version with 32Kb FIFO per channel, standard timing
    PMC-BiSerial-II-16 - Standard version with 64Kb FIFO per channel, standard timing
    PMC-BiSerial-II-32 - Standard version with 128Kb FIFO per channel, standard timing
    PMC-BiSerial-II-64 - Standard version with 256Kb FIFO per channel, standard timing
    PMC-BiSerial-II-128 - Standard version with 512Kb FIFO per channel, standard timing

    Engineering Kits
    PMC-BIS-II-ENG-1
    Engineering Kit for PMC-BiSerial-II includes: Board level Schematics [PDF], Reference Software [WIN NT, WinRT, Visual C ZIP file], HDEterm68-MP, HDEcabl68

    PMC-BIS-II-ENG-2
    Engineering Kit for PMC-BiSerial II includes: PCI2PMC adapter card, board level Schematics [PDF], Reference Software [WIN NT, WinRT, Visual C ZIP file], HDEterm68-M, HDEcabl68



    Customer Special Versions
    You can order these too or request that we design one for you


    BiSerial II version Nvy1
    Customer: Navy
    The Nvy1 protocol implemented provides redundant Manchester encoded data inputs and outputs. -128 FIFO option utilized. Additional two UARTs provided. Click here for manual


    BiSerial II version NG1
    Customer: Northrop Grumman
    The NG1 protocol implemented provides two synchronous and two asynchronous ports plus clock distribution and status. Windows driver available.
    User manual
    Driver manual


    BiSerial II version PS2
    Customer: Photo-Sonics Inc
    The PS2 version implemented provides 8 synchronous ports plus an 8 bit parallel port with COS input capability. The synchronous ports are configured with 4 Transmit and 4 Receive. Programmable clock rate. Data, Clock and Strobe interface. Lsb first data. each channel has 128 x 32 FIFO using internal block RAM. Engineering Kit available.
    User manual

    Related Products:
    HDEcabl68 SCSI II/III Cable
    HDEterm68 SCSI II/III to 68 pin terminal block
    PCI2PMC PCI to PMC adapter card
    PCIBPMC bridged PCI to PMC adapter card
    cPCI2PMC cPCI to PMC adapter card 3U 4HP
    PMC Extendio II PMC extension cable set - move your PMC up to 12" away from the host.



    You must have Adobe Acrobat 4.x to read our PDF files.
    PMC-BiSerial-II manual PDF
    PMC-BiSerial-NVY1 manual PDF
    PMC-BiSerial-NG1 user manual PDF
    NG1 Driver manual PDF




    Custom, IP, PMC, PC*MIP, PCI, VME Hardware, Software designed to your requirements



    Home | News | Search the Dynamic Engineering Site





     [an error occurred while processing this directive]