cPCI2PMC (cPCI to PMC) adapter/carrier converter card provides the ability to install one PMC or PrPMC card into a standard cPCI slot. cPCI2PMC has a PMC card slot mounted to a universal 3U 4HP cPCI card. Suitable for 32/64 with 33/ 66 MHz bus operation. The PMC user IO connector Pn4 is optionally connected to J2 for rear panel IO. The PMC bezel connector is mounted though the cPCI mounting bracket. Optional Slot 0 operation with Bus Arbitration, Reset, clock distribution provided.
The cPCI bus is buffered with 10 ohm series resistors. The PCI clock is distributed with a zero delay buffer. The cPCI2PMC design is passive with no added delays to access the PMC hardware. The traces are carefully routed with proper attention paid to the impedance and reference planes to maximize compatibility with your cPCI system. The passive design of the cPCI2PMC reduces system latency.
The PCI bus is interconnected to the PMC via 64 bit 66 MHz capable layout. The slower and more narrow device will determine the interface characteristics. The M66EN selection allows the user to specify the PCI speed capabilities. M66EN is interconnected between the cPCI bus, jumper, and PMC device.
cPCI VIO is interconnected to the PMC directly. The PCI backplane will determine the bus voltage reference. The voltage select pins are not installed on the cPCI2PMC. It is for the user to properly select the PMC and cPCI motherboard for cPCI voltage level considerations. Many PMC´s are "universal" and can work with 3.3 or 5V cPCI backplanes. If you need to use a 3.3V card on a 5V backplane or vice-versa please consider the cPCIBPMC3U64ET
design. The bridged implementation provides level shifting between the cPCI and PMC buses.
cPCI2PMC follows the PMC specs for maximum power consumption and heat dissipation. The power is routed from the cPCI to PMC connectors with mini-planes. Each of which is rated for more than the maximum PMC draw. 3.3V, 5V, VIO, +12V, -12V.
The individual pins on the JN4 (PN4) connector are accessible when the IO option is specified. With 3U cPCI , J2 has two definitions - in a 64 bit PCI implementation J2 has the upper A/D and control signals, and in a 32 bit PCI implemention J2 has the rear panel IO. With resistor jumpers the IO or the PCI signals can be connected to J2. Please be sure to specify -IO, -64, or blank [neither]. The routing is impedance controlled and matched length.
With the RevK and later boards cooling fans are an available option. High velocity 12V fans can be mounted to the rear or medium velocity "Zero Slot" fans can be mounted to the board. WIth the "Zero Slot" fans no extra cPCI positions are used for the fan, and the fans are legal for a PMC height and cPCI height specifications. Approximately 5 CFM per installed "Zero Slot" fan. The fans can be installed to blow onto the PMC or to pull air away from the PMC and to blow onto the card in the next cPCI slot. Fan1 is above J1 and Fan2 above J2.
The PMC JTAG connections are routed to a header. The header is configured to for discrete connections. Please add -JTAG if you want the header installed on your cPCI2PMC.
If you have custom requirements please call or e-mail us with the details.