Made in USA
The Embedded Solutions Experts

PMC-SpaceWire
Use PMC adapter for PCIe applications
PMC-SpaceWire Description
- Windows®, Linux, or VxWorks driver available with purchase
- DMA on all channels
- 4 channels each (3 on bezel) with 1 transmitter and 1 receiver. BK models 200 MHz rated.
- Time Code support
- Two SW models: Standard and the new enhanced BK version
- 1 year warranty standard. Extended warranty available.
- Extended Temperature standard.
- ROHS and Standard processing available
Utilize SpaceWire to communicate with the European Space Agency and NASA equipment utilizing the ECSS-E-ST-50-12C specification. SpaceWire is configured using routers to create a heirarchical point-to-point system with high speed parallel paths. PMC-SpaceWire is frequently used as part of EGSE [Electronic Ground Support Equipment]. The conduction cooled version ccPMC-SpaceWire is usually preferred for launch equipment.
PMC SpaceWire implements SpaceWire in a convenient PMC format. With PMC you can install the adapter into PCI [PCIBPMC], cPCI [cPCI2PMC], or processor board PMC slots. The SpaceWire specification calls for LVDS signaling and a specific 9 pin micro-D connector. You can connect the PMC-SpaceWire to other SpaceWire compliant devices without electrical interface issues
Four fully independent and highly programmable LVDS IO channels [ports] are provided by the PMC-SpaceWire design. In the SpaceWire implementation the channels pass tokens between two independent state-machines to provide the proper protocol. The SpaceWire protocol is advanced with link testing, error handling, command and data protocols built in. The SpaceWire electrical interface is point-to-point. With the SpaceWire protocol it is easy to build a heirarchical architecture system with routers or a home-run wired system. Your equipment can interact with any other node in the system. PMC-SpaceWire provides a bridge from PCI <=> SpaceWire. Time code handing is supported for both generating and receiving / retransmitting. The local time can be transmitted at programmable intervals or time code received on the IO channels can be used internally as well as re-routed to the other channels.
Each port has FIFO memory with 4 Kbytes TX and 4K bytes RX standard and up to 512Kbytes as an option. The FIFO´s are 32 bits wide to optimize data transfer from the PCI bus. The base FIFO´s are internal to the FPGA and utilize dual ported RAM configured as a FIFO. Two external positions are available for larger FIFO´s to be installed to support one of the ports in both directions or two of the ports in one direction.
The bus interface is optimized to minimize the latency on the PCI bus. The loop-back test can be used for BIT and for software development. The programmable FIFO flags are supported for interrupt or polled operation. Programmable Almost Full, Programmable Almost Empty, plus Full, Half Full, and Empty. The programmable flags can be set to any debth to allow the software a programmable delay from event to empty or full. The interrupts can be very useful when sending or receiving messages larger than the FIFO size.
SpaceWire features automatic link testing when a node is brought on line - released for operation via software. The transmitter sends NULLs until NULLs are received and then sends FCTs until FCTs are received. The initial frequency is specified [ECSS-E-ST-50-12C] to be 10 MHz. Once the auto link test has passed, the hardware can switch to the programmed rate. A local oscillator is used to supply the 10 MHz reference clock for initialization. A programmable PLL is used to support operation once the link is established. The PLL is programmed via software and is referenced to the oscillator.
The SpaceWire protocol has flow control. The local memory on the PMC-SpaceWire will not overrun. In situations where the data being sent to the PMC-SpaceWire card is not buffered it is recommended to use a "-128" model with large FIFO´s on channel 0. The issue is upstream - if there is an unbuffered or under-buffered data source that will loose data if the link is throttled back the larger FIFO´s will help. The larger FIFOs will provide more room to accumulate data if the system is not ready to allow the PMC-SpaceWire to DMA transfer it immediately. The DMA transfers are higher bandwidth than the SpaceWire transfers allowing the system to catch-up once the DMA transfers restart. At 100 MHz and 80% data transfer the 128x32 FIFO will provide about 52 mS of data storage. The host would have to ignore the PMC-SpaceWire interrupt requests for longer than 52 mS before throttling would occur. In most systems this is sufficient time to stay out of the throttled mode. To unload a full FIFO with DMA running it will take 128K/33M = .4mS => the unload to load multiplier is stongly in favor of the host side allowing the host to catch-up to the SpaceWire link once the delaying event has passed.
With the 10-2008-0805 PCB, PMC-SpaceWire has been updated to use a Spartan 6 FPGA. The revision "K" design has been ported to this FPGA and will be the default FLASH program going forward. New versions of the card will have an additional "-BK" Beyond K added to the part number to make sure orders for current systems are filled with compatible HW. New features are planned to make use of the new larger Industrial Temperature FPGA. All 10-2008-0805 and later boards will be Industrial Temperature as a standard feature. Planned features include larger internal FIFO´s, error injection, rearranged memory map to make room for additional features, wider counters and more options for interrupts. Please send in your requests for added features.
PMC-SpaceWire is supported with the DESWBO Dynamic Engineering SpaceWire BreakOut tool for debugging SpaceWire systems, cables, carriers, and the DESWCB Dynamic Engineering SpaceWire Connector Board which provides a SpaceWire Cable to system cable interface.
If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface.... email us your wish list or call today!
PMC-SpaceWire Block Diagram
The standard timing uses the data and strobe to transmit and to receive the data. The data is transmitted as a command or data. The strobe provides the transitions for clocking when the data is unchanged between adjacent bit times.
PMC-SpaceWire Standard Timing
PMC SpaceWire implements SpaceWire in a convenient PMC format. With PMC you can install the adapter into PCI [PCIBPMC], cPCI [cPCI2PMC], or processor board PMC slots. The SpaceWire specification calls for LVDS signaling and a specific 9 pin micro-D connector. You can connect the PMC-SpaceWire to other SpaceWire compliant devices without electrical interface issues
Four fully independent and highly programmable LVDS IO channels [ports] are provided by the PMC-SpaceWire design. In the SpaceWire implementation the channels pass tokens between two independent state-machines to provide the proper protocol. The SpaceWire protocol is advanced with link testing, error handling, command and data protocols built in. The SpaceWire electrical interface is point-to-point. With the SpaceWire protocol it is easy to build a heirarchical architecture system with routers or a home-run wired system. Your equipment can interact with any other node in the system. PMC-SpaceWire provides a bridge from PCI <=> SpaceWire. Time code handing is supported for both generating and receiving / retransmitting. The local time can be transmitted at programmable intervals or time code received on the IO channels can be used internally as well as re-routed to the other channels.
Each port has FIFO memory with 4 Kbytes TX and 4K bytes RX standard and up to 512Kbytes as an option. The FIFO´s are 32 bits wide to optimize data transfer from the PCI bus. The base FIFO´s are internal to the FPGA and utilize dual ported RAM configured as a FIFO. Two external positions are available for larger FIFO´s to be installed to support one of the ports in both directions or two of the ports in one direction.
The bus interface is optimized to minimize the latency on the PCI bus. The loop-back test can be used for BIT and for software development. The programmable FIFO flags are supported for interrupt or polled operation. Programmable Almost Full, Programmable Almost Empty, plus Full, Half Full, and Empty. The programmable flags can be set to any debth to allow the software a programmable delay from event to empty or full. The interrupts can be very useful when sending or receiving messages larger than the FIFO size.
SpaceWire features automatic link testing when a node is brought on line - released for operation via software. The transmitter sends NULLs until NULLs are received and then sends FCTs until FCTs are received. The initial frequency is specified [ECSS-E-ST-50-12C] to be 10 MHz. Once the auto link test has passed, the hardware can switch to the programmed rate. A local oscillator is used to supply the 10 MHz reference clock for initialization. A programmable PLL is used to support operation once the link is established. The PLL is programmed via software and is referenced to the oscillator.
The SpaceWire protocol has flow control. The local memory on the PMC-SpaceWire will not overrun. In situations where the data being sent to the PMC-SpaceWire card is not buffered it is recommended to use a "-128" model with large FIFO´s on channel 0. The issue is upstream - if there is an unbuffered or under-buffered data source that will loose data if the link is throttled back the larger FIFO´s will help. The larger FIFOs will provide more room to accumulate data if the system is not ready to allow the PMC-SpaceWire to DMA transfer it immediately. The DMA transfers are higher bandwidth than the SpaceWire transfers allowing the system to catch-up once the DMA transfers restart. At 100 MHz and 80% data transfer the 128x32 FIFO will provide about 52 mS of data storage. The host would have to ignore the PMC-SpaceWire interrupt requests for longer than 52 mS before throttling would occur. In most systems this is sufficient time to stay out of the throttled mode. To unload a full FIFO with DMA running it will take 128K/33M = .4mS => the unload to load multiplier is stongly in favor of the host side allowing the host to catch-up to the SpaceWire link once the delaying event has passed.
With the 10-2008-0805 PCB, PMC-SpaceWire has been updated to use a Spartan 6 FPGA. The revision "K" design has been ported to this FPGA and will be the default FLASH program going forward. New versions of the card will have an additional "-BK" Beyond K added to the part number to make sure orders for current systems are filled with compatible HW. New features are planned to make use of the new larger Industrial Temperature FPGA. All 10-2008-0805 and later boards will be Industrial Temperature as a standard feature. Planned features include larger internal FIFO´s, error injection, rearranged memory map to make room for additional features, wider counters and more options for interrupts. Please send in your requests for added features.
PMC-SpaceWire is supported with the DESWBO Dynamic Engineering SpaceWire BreakOut tool for debugging SpaceWire systems, cables, carriers, and the DESWCB Dynamic Engineering SpaceWire Connector Board which provides a SpaceWire Cable to system cable interface.
If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface.... email us your wish list or call today!
The standard timing uses the data and strobe to transmit and to receive the data. The data is transmitted as a command or data. The strobe provides the transitions for clocking when the data is unchanged between adjacent bit times.
PMC-SpaceWire Features
Size
Standard Single PMC
Transmit Speeds
10 MHz initial rate per SpaceWire Specification. Software selectable secondary rate for transmit channel. Max. [K]frequency currently 180 Mhz. BK models rated at 200 MHz. Oscillator and programmable PLL combined for user frequency support.
PCI Speed
Standard 33 MHz. operation. DMA support or standard R/W operations, DMA is independent per channel - each channel has a separate controller to allow long data transfers with minimal CPU overhead and increased performance.
PCI Access Width
Standard 32 bit operation supported
Software Interface
PMC registers are read-writeable. Transmit and Receive functions separated.
Interrupts
Transmit and Receive state-machines, FIFO Programmable almost empty [transmit] and programmable almost full [receive] have programmable interrupts. Status can be polled for non-interrupt driven operation as well. Time Code interrupt.
Signaling
LVDS interface devices are utilized.
IO Interface
IO is available [3 ports] via the PMC bezel connectors or through Pn4 [4 ports]. The differential IO is routed with controlled impedance, and matched lengths on each of the pairs. 9 Pin MDM connectors as specified in ECSS-E-ST-50-12C.
Interface
ECSS-E-ST-50-12C specification compliant. Time Code supported.
Specification
PMC specification compliant
Power
5V and 3.3V from PMC connector with 2.5V, 1.2V, (1.8V) converted with on-board regulators.
Memory
Separate FIFO´s are provided for TX and RX of each channel. Internal Block RAM creating 4K[K model] 64K[BK model] is standard for all channels. 128K x 32 is available on port 0. Add -128 to part number for this option -128RX uses the external FIFO´s for port 0 and port 1 RX path.
Statement of Volatility
DIP switch
An 8 position switch is available to allow for configuration control, multiple PMC SpaceWire boards, and to facilitate integration
PMC-SpaceWire Benefits
Speed
PMC-SpaceWire is optimized for serial interfacing requirements. The FIFO memories and programmable interrupts off-load the CPU from most of the management other implementations require. FIFO access is optimized for the PCI bus further reducing overhead by speeding up the data transfer. On the IO side the PMC SpaceWire has independent and interconnected port functions. All ports can operate at maximum rate in parallel.
Price
PMC-SpaceWire is available off-the-shelf at a reasonable price. Custom versions can also be arranged. The PMC SpaceWire is easily programmed to implement new functions. Previously implemented "custom designs" are available too. Without the costs of schematic level design, layout, debugging etc. A modified SpaceWire will represent a large cost and time savings in your budget.
Ease of Use
PMC-SpaceWire is easy to use. Point and shoot - just fill the FIFO and set the start bit to get your custom protocol transmitting. Built in loop-back capabilities and reference software help with integration into your system. Windows® Linux and VXWorks driver(s) available.
Availability
Dynamic Engineering works to keep PMC-SpaceWire [K and BK] in stock. Send in your order, and in most cases have your hardware fast. With custom designs a few week design period is usually required. We can support immediately with the std version, then send updated FLASH files later to help get your project going - right away.
Size
PMC-SpaceWire is a standard single width PMC card, and meets the PMC mechanical specifications. PMC-SpaceWire can be used in all PMC positions [universal voltage]
PMC Compatibility
PMC-SpaceWire is PMC compliant per the IEEE 1386 specification.
PCI Compatibility
PMC-SpaceWire is PCI compliant. You can develop with a PCI e) to PMC adapter - PCI2PMC, PCIeBPMCX1 etc.
Part Number: PMC-SpaceWire
Ordering Options
- PMC-SpaceWire Standard board - Standard version with 4Kb FIFO per channel, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Three channels through the Bezel and 1 on Pn4.
Order combinations of the options by simply adding the extension(s) to your order request.
-128 - Standard version with 4Kb FIFO per channel plus 512K [128K x 32] FIFO´s added to port 0 [TX and RX], standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Three channels through the Bezel and 1 on Pn4
-128RX - Standard version with 4Kb FIFO per channel plus 512K [128K x 32] FIFO´s added to channel 0 and 1 on RX, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Three channels through the Bezel and 1 on Pn4
-BK - BK version with 64Kb FIFO per channel, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Updated version recommended for new designs.
-CC - add Conformal Coating
-ROHS - add ROHS processing
-Pn4 - Four channels through Pn4. blank bezel supplied
-Monitor - Add 512K [128K x 32] FIFOs to port 0 and port 1, Change FLASH to Monitor function to capture data streams on Ports 0,1. Application manages HW and stores data to file. Each packet is pre-pended with time tag, packet number and size.
PMC-SpaceWire Drivers
Software Support is supplied in the form of Windows, Linux, and VxWorks packages. The manuals are available on the SpaceWire Summary page. Windows and Linux are included in purchase. VxWorks requires an additional fee.
PMC-SpaceWire Manuals
Hardware. The Hardware manuals for K amnd BK models plus related products are available on the SpaceWire Summary page.
PMC SpaceWire version BS2BI
Customer: Lockheed Martin
The BS2BI [BiSerial Two Bit Interface] uses two serial bits along with an enable and clock to transfer data at 10MHz or 50 MHz. for an effective serial rate of 20 Mbits or 100 Mbits/sec. Single or multiple word transfers. LVDS protocol. DMA support. Uses PMC-SpaceWire fab with alternate protocol.
Download the BS2BI Hardware manual
PMC SpaceWire version BS2BI
Customer: Lockheed Martin
The BS2BI [BiSerial Two Bit Interface] uses two serial bits along with an enable and clock to transfer data at 10MHz or 50 MHz. for an effective serial rate of 20 Mbits or 100 Mbits/sec. Single or multiple word transfers. LVDS protocol. DMA support. Uses PMC-SpaceWire fab with alternate protocol.
Download the BS2BI Hardware manual